This FPGA design example demonstrates basic JPEG image handling, using the JPEG Decoder Drivers. A JPEG image is linked to the embedded project (
Embedded Project Options » Compiler Options » Linker » Miscellaneous » Additional linker options).
This JPEG image is plotted on the LCD using:
- one shot decoding
- partial decoding with changing size
- partial decoding with changing origin
- block read of data
- block write of data
- header reading
A short description is also displayed on the Terminal Instrument as each of the different stages. The example demonstrates the use of JPEG Decoder drivers, VGA TFT Driver and Serial Device I/O Context.
The TSK3000, Terminal Instrument, JPEG Decoder V2, VGA 32 bit TFT Controller, Arbiter and SRAM controller cores are used in this example.
Altium Designer projects included in this download:
- JPEG_Decoder.PrjFpg
- JPEG_Decoder.PrjEmb
